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公告主旨 Mentor Graphics 明導國際 - Associate Applications Engineer (AAE)- Functional Verification
公告單位 學生事務處--學生職業生涯發展中心
公告時間 2021/1/28 上午 09:05:25              0 DISLIKE
公告內容 Mentor, a Siemens Business (Mentor Graphics) is now inviting applications for our Associate / Graduate Program for the position of Associate Applications Engineer (AAE) – Functional Verification in HsinChu, Taiwan.

In this position, you will be involved in a structured Associate Engineer Training Program. This is a fast-track training program that challenges you to develop the expertise needed to solve difficult technical problems and the commercial skills needed to work with customers within the region. Associate Applications Engineers join us as members of a team of highly motivated individuals working with customers designing the most complex hardware and software systems in the world and whose applications span the electronics industry. This training program will give you unique insight into our product marketing divisions and sales organization and the opportunity to work with and learn from industry experts. Upon successful completion of the program, you will be eligible to progress into an Application Engineer role, focusing on developing technical relationships at the engineering level with customers including customer presentations, needs analysis, product demonstrations, and coordination of benchmarking and evaluation activities.

This position is open to 2020/2021 Graduates who have a bachelor or masters degree in Electrical or Computer Engineering. Programming skills in C/C ++, Tcl/TK, PERL as well as an understanding of object oriented concepts as applied to a Verification Environment. Coursework/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional verification methodology, for ASICs and/or FPGAs. This experience/coursework should include some or all of the following: testbench architecture, design and implementation using SV/UVM verification methodology,VHDL and/or Verilog HDL simulation, SystemVerilog and Assertion-Based Verification techniques. Experience in constrained random directed testing, is also desirable

Ideal candidates may take below courses before:
電子學 / 電子電路 / 計算機結構 / 半導體設計與測試 / 記憶體設計與測試 / 程式語言

Welcome qualified candidates, who are new graduates and/or who are without working experience to apply the AAE position. Submit resume with Chinese name to hr_twn@mentor.com

Mentor Graphics Taiwan: https://www.mentor.com/taiwan/
Mentor Job @ 104: https://bit.ly/39oR2HD
相關網址 https://bit.ly/39oR2HD
公告對象 教職員、學生、校友、其他
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版權所有 國立台灣大學 計算機及資訊網路中心
10617 臺北市羅斯福路四段一號
TEL:(02)3366-5022或3366-5023
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